1. Field of the Invention
The present invention relates generally to electrical devices, and more particularly but not exclusively to CMOS devices.
2. Description of the Background Art
Devices fabricated using complementary metal-oxide-semiconductor (CMOS) technology are used in many electrical circuits, including those in integrated circuit (IC) form. A CMOS transistor is an example of a CMOS device. As is well known, a CMOS transistor includes a source, a drain, and a gate. An enhancement-mode CMOS transistor may be switched ON by applying a positive voltage greater than the threshold voltage on the gate to create an inversion layer, also referred to as a “channel,” along the interface of the gate and the transistor's body region. The channel provides a path for electron current to flow from the source, through the channel, and into the drain. Reducing the gate voltage removes the channel, thereby switching OFF the transistor.
Transistors are being designed with shorter channel lengths to pack more transistors in a given integrated circuit. This leads to undesirable short channel effects, such as punch-through leakage. Conventional solutions for reducing short channel effects include thinner gate oxides and heavier body doping. These solutions are not without drawbacks. Thinner gate oxides limit the maximum gate voltage of the transistor, while heavier body doping reduces the breakdown voltage and worsens hot-carrier reliability.